A multi-layered printed wiring board typically includes a large sized multi-layered printed wiring board for mother board and a small sized multi-layered printed wiring board for system-in-package (SiP) (referred to as a semiconductor package substrate). In recent years, as the high density packaging technology for semiconductor devices is advanced, semiconductor package substrates including micro interconnects have attracted attentions. When a semiconductor element is packaged on to a semiconductor package substrate via a flip-chip process in the conventional technology, such semiconductor package substrate is required to have sufficient mechanical strength for ensuring a certain packaging reliability. Therefore, an internal layer circuit board having a certain thickness for sufficient mechanical strength has been employed for such semiconductor package substrate. However, when two or more of such internal layer circuit boards are stacked under the circumstance that increased number of layers are required due to requirements for higher integration and higher packaging, the thickness of the obtained semiconductor package substrate is considerably increased.
The multi-layered printed wiring board is generally manufactured via a building-up process, in which insulating resin films and conductor circuit layers are alternately deposited over an internal layer circuit board. In the process for manufacturing the multi-layered printed wiring board by the building-up process, an insulating resin film with a carrier is employed for forming an insulating resin film. In the trend of reducing the thickness of the multi-layered printed wiring board, various investigations are also made on the insulating resin film with the carrier for the purpose of providing higher mechanical strength. For example, a process for obtaining a multi-layered printed wiring board having improved mechanical strength and packaging reliability by employing a prepreg with carrier employing a prepreg as an insulating resin film is proposed in Patent Document 1.
Further, a method for obtaining a prepreg by laminating insulating resin films on both sides of a glass cross with a roller laminator apparatus is disclosed as a process for manufacturing of a prepreg (for example, Patent Document 2). Such process for obtaining the prepreg with a roller laminator apparatus provides easier control of the thickness of the obtained prepreg, as compared with a process for immersing a sheet-like base material within a resin varnish and then drying thereof.
Further, in such process to be employed this roller laminator apparatus, a resin composition or a thickness of the insulating resin films laminated on both sides of the base material such as a glass cross, based on a desired design of a multi-layered printed wiring board.
However, when insulating resin films having different resin compositions and/or thicknesses are laminated on the front surface and the back surface of the base member, it is difficult to specify the front and the back surfaces of the obtained prepreg. This may cause erroneous laminations for the front and the back surface of the prepreg on the internal layer circuit board when a multiple-layered printed wiring board is manufactured employing such prepreg, causing a failure in the obtained multiple-layered printed wiring board. In addition, the failure of the multiple-layered printed wiring board may, in turn, stops the next operation in the process for manufacturing the semiconductor device employing the multiple-layered printed wiring board. Even if it is allowed to forward the operation in the process for manufacturing the semiconductor device, the semiconductor devices having sufficient packaging reliability may not be possibly obtained.
The present invention is, taking into account such situation, to provide a prepreg with a carrier, which provides a visual identification for front and back surfaces. The present invention is also to provide a multi-layered printed wiring board employing such prepreg with the carrier, which exhibits enhanced reliability. The present invention is also to provide a semiconductor device employing such multi-layered printed wiring board, which exhibits improved packaging reliability.    [Patent Document 1]    Japanese Patent Laid-Open No. 2004-342,871    [Patent Document 2]    Japanese Patent Laid-Open No. 2004-123,870